Annual Meeting Program
Download Detailed Technical Program
Updated on June 20, 2016
Download the Program at a Glance
Updated on June 13, 2016
Wednesday, June 22, 2016
University of Brescia, Engineering Campus
Via Branze 38, Brescia
|
‘Aula MAGNA’ |
‘Sala CONSILIARE’ |
10.00 |
Registration |
11.00 – 13.00 |
|
“Consiglio Scientifico GE”
Only for GE Members
(in Italian) |
13.00 – 14.30 |
Lunch |
14.30 – 15.10 |
Welcome Address
OPENING SPEECH
A. LACAITA
GE President
(in Italian) |
|
15.10 – 15.50 |
OPENING LECTURE
R. BEZ
Lfoundry
(in Italian) |
|
15.50 – 16.30 |
OPENING LECTURE
M. DE VITTORIO
Università del Salento, Lecce, Italy
(in Italian) |
|
16.30 – 17.00 |
Coffee break |
17.00 – 18.20 |
Oral Session A1:
Integrated Circuits and
Systems
|
Oral Session A2:
Electronic Systems and
Applications
|
|
20.00 |
Welcome Dinner |
Thursday, June 23, 2016
University of Brescia, Engineering Campus
Via Branze 38, Brescia
|
‘Aula MAGNA’ |
‘Sala CONSILIARE’ |
09.10 – 09.50 |
INVITED LECTURE
S. BASROUR
Université Grenoble Alpes, France |
|
09.50 – 10.30 |
INVITED LECTURE
R. DAHIYA
University of Glasgow, Scotland |
|
10.30 – 11.00 |
Poster Session (with Coffee Break) |
11.00 – 13.00 |
Oral Session B1:
Microwave Electronics and
Radiation Detection
|
Oral Session B2:
Techniques, Circuits and
Architectures
|
13.00 – 14.30 |
Lunch |
14.30 – 15.10 |
INVITED LECTURE
L. BALDI
Formerly ST Microelectronics |
|
15.10 – 16.30 |
Oral Session C1:
Optoelectronics and
Photonics
|
Oral Session C2:
Sensors, Microsystems
and Instrumentation
|
16.30 – 17.00 |
Poster Session (with Coffee Break) |
17.00 – 18.20 |
Oral Session D1:
Micro- and Nano-
Electronic Devices
|
Oral Session D2:
Power Electronics
|
|
19.30 |
Social Dinner |
Friday, June 24, 2016
University of Brescia, Engineering Campus
Via Branze 38, Brescia
|
‘Aula MAGNA’ |
‘Sala CONSILIARE’ |
09.00 – 10.40 |
TAVOLA ROTONDA
Scenari, prospettive e opportunità di integrazione tra discipline elettriche ed elettroniche
(in Italian) |
|
10.40 – 11.10 |
Coffee Break |
11.10 – 11.40 |
Recognitions and Awards |
|
11.40 – 12.20 |
GE DISTINGUISHED LECTURER
C. METRA
University of Bologna, Italy |
|
12.20 – 13.00 |
GE DISTINGUISHED LECTURER
L. SELMI
University of Udine, Italy |
|
13.00 – 14.30 |
Lunch |
14.30 – 15.30 |
“Assemblea Ordinaria GE”
Only for GE Members
(in Italian) |
|
15.30 – 16.00 |
Coffee break |
16.00 – 17.30 |
“Assemblea Straordinaria GE”
Only for GE Members
(in Italian) |
|
GE2016 Opening Lecturers
Wednesday, June 22, 2016
h. 15.10 – 15.50
Roberto BEZ
Lfoundry, Italy
Dalla Grande Azienda al Tessuto Microelettronico Regionale
ABSTRACT
The semiconductor industry, driven by the electronic market evolution, is now consolidated. The level of investments to stay on the leading edge technology is so high that only very few companies have remained as the technology drivers, only for memory or advanced logic technology, enabled by the market size and shares. Considering the semiconductor industry rank in terms of revenues, it is clear that the long lasting Integrated Device Manufacturer (IDM) model is now paired by the fabless-foundry one. This second model applied well but also better for applications where the key word is technology diversification, i.e. what is under the “More than Moore†definition compared to the “More Moore†roadmap.
The Internet of Things (IoT) is considered a new engine for the semiconductor industry growth and will be fundamental to interconnect entities to help everyday life. Semiconductor company will supply products for many different applications, like wearable devices, automated lightning/heating and industrial automation. In this context, where the number of connected things is forecasted to grow exponentially in the next decade, there will be a very good opportunity to exploit better the European local ecosystem. Key ingredient will be the creation of positive interactions between product companies, design houses and silicon foundries. These lasts may play a significant role, thanks to their leadership in some key enabler technology, e.g. in sensors, MEMS, power and smart card, this last fundamental to address the security in the data communication. Moreover there are other fields, like for example space, science or medical applications, in which the European ecosystem can be further fostered by the interaction with the well-developed research center and university network, making the difference to become a world excellence.
BIOGRAPHY
Roberto Bez is presently the Senior Vice-President of R&D in LFoundry, joined in February 2015. He started his career in the semiconductor industry in 1987 in the Central R&D of STMicroelectronics. The main topics he worked on were the device physics, characterization and modelling, and the Non-Volatile Memory (NVM) technologies, where he contributed to the development of different memory architectures, i.e. NOR, NAND and Phase-Change Memory (PCM). In March 2008 he joined Numonyx as Fellow, driving the development of the PCM and other alternative NVM technology. From April 2010 to January 2015 he has been with Micron as Fellow and as Process Integration Director in the Process R&D. He received the Laurea degree in Physics from the University of Milan, Italy in 1985.He has authored or co-authored more than 140 publications and presentations in scientific and technical journals and international conferences and of 60 patents on different microelectronics topics. He has been member of the Technical Committee at IEDM, ESSDERC, EPCOS and Symp. of VLSI Tech.; he has been member of the ESSDERC/ESSCIRC Steering Committee. He has been Contract Professor in Electron Device Physics at the University of Milan and Lecturer in Non-Volatile Memory Devices at the University of Padua, Politecnico of Milan and University of Udine.
Wednesday, June 22, 2016
h. 15.50 – 16.30
Massimo DE VITTORIO
Istituto Italiano di Tecnologia (IIT), Center for Bio-Molecular Nanotechnology, Università del Salento, Lecce, Italy
Infrastrutture nell’ambito delle Micro e Nanotecnologie per l’Elettronica: Risorse ed Opportunità
ABSTRACT
Vi è una fortissima richiesta di tecnologie e dispositivi fotonici, elettronici e MEMS di nuova generazione nell’ambito dell’elettronica indossabile ed impiantabile, dell’ICT, del life-science e dell’energia.
Lo sviluppo di queste tecnologie, classificate “More than Moore” nelle roadmap tecnologiche, richiede competenze di design di elettronica circuitale e di progettazione di dispositivi e microsistemi, capacità di simulazione, esperienza in micro- e nano-fabbricazione, ma, soprattutto, non può prescindere dalla presenza di infrastrutture tecnologiche per dimostrazioni di principio e prototipazione.
Mentre nel panorama internazionale, presso campus universitari e poli tecnologici, esistono vere e proprie foundry aperte ad utenze interne ed esterne, sia pubbliche che private, in Italia questa opportunità non è stata ancora colta. In questo intervento si discuterà del panorama delle infrastrutture tecnologiche esistenti e delle loro modalità di accesso, delle opportunità di costituire una rete virtuale di laboratori e di porre a sistema tali capacità tecnologiche.
BIOGRAPHY
Massimo De Vittorio è direttore del Center for Biomolecular Nanotechnologies (CBN) dell’Istituto Italiano di Tecnologia (IIT), professore associato presso l’Università del Salento è cofondatore dei laboratori nazionali di nanotecnologia presso il CNR di Lecce.
Le sue attività di ricerca sono rivolte alla scienza e tecnologia applicata allo sviluppo di dispositivi fotonici, elettronici e MEMS per applicazioni in robotica, life-science e energia. Autore di circa 210 articoli su riviste internazionali, 60 proceedings, 13 brevetti e numerosi seminari invited/keynote a conferenze internazionali, Massimo De Vittorio è anche senior editor della rivista IEEE Transactions on Nanotechnology e fondatore di 5 start-up, spin-off dei risultati della sua ricerca.
GE2016 Invited Lecturers
Thursday, June 23, 2016
h. 09.10 – 09.50
Skandar BASROUR
Université Grenoble Alpes and TIMA Lab, Grenoble, France
Research Activities at TIMA Laboratory
ABSTRACT
In this talk we will give at first a broad overview of the research and academic activities in the fields of electrical engineering, and computer science developed in the framework of the Université Grenoble Alpes and Grenoble Institute of Technology.
Afterwards, we will present the different research topics investigated in TIMA Laboratory. The themes cover the specification, design, verification, test, CAD tools and design methods for integrated systems, from analog and digital components on one end of the spectrum, to multiprocessor Systems-on-Chip together with their basic operating system on the other end.
Finally, we will focus on the recent developments of the CDSI group and in particular on Micro and Nano Systems activities. A particular attention will be paid to the presentation of new micro generators for autonomous sensors, and of MEMS for acoustic and haptic applications.
BIOGRAPHY
Skandar Basrour graduated from the Ecole Normale Supérieure, Tunisia, in 1986, and received the Ph.D. degree in microelectronics from the Université Joseph Fourier (UJF), Grenoble, France, in 1990. From 1992 to 2001, he was an assistant professor in electronics and microsystems at the Université de Franche-Comté, Besancon, France. He contributed to the development and the improvement of 3D microfabrication techniques (X-ray and UV LIGA). Since 2001, he is a professor in electronics and microsystems at the Electrical Department of Polytech Grenoble, UJF. Since 2002, he is the leader of the Micro Engineering and Nano Systems (MNS) group within the TIMA laboratory. His research activities involve the design, fabrication, and characterization of integrated MEMS, NEMS, and micropower sources. Since 2010, parts of his research activities are utilized in two start-up. Since 2015, he is the deputy director of TIMA Lab.
Thursday, June 23, 2016
h. 09.50 – 10.30
Ravinder DAHIYA
University of Glasgow, Scotland
Large Area Conformable Electronics
ABSTRACT
The microelectronics technology and subsequent miniaturization have improved our lives through revolutionized computing, communication. The exponential rate of advancement based on Moore’s Law has been propelled by $1Tr of investment over 50 years. Recent advances in the field, pursued through More than Moore technology, are propelled by applications such as wearable systems, health monitoring, displays, and biomedical applications etc. Many of these applications require electronics to be present over large areas and to conform to 3D surfaces and this calls for new methods to realize electronics on unconventional substrates such as plastics. The sensitive electronics systems on large areas (larger than the traditional wafers) and possibly stretchable substrates will open avenues for new advances such as robots with conformable electronic skin.
This talk will present various approaches (over different time and dimensional scales) for obtaining distributed electronics and sensors on flexible and conformable substrates, especially in context with tactile or electronics skin. The lecture will begin with recent developments such as using off-the-shelf sensors and electronic components on flexible printed circuit boards to obtain large area tactile skin for robots and wearable systems. This will be followed by various other alternatives being explored today (e.g. printing of nanowires, and ultra-thin chips, etc.) and the potential challenges and success on various time scales. The lecture will conclude with a discussion on how the field and associated technologies may evolve in the future with new emerging applications such as internet of things, smart cities and mobile health.
BIOGRAPHY
Dr. Ravinder Dahiya is Reader and EPSRC (Engineering and Physical Science Research Council) Fellow in the School of Engineering at University of Glasgow, UK. He is the leader of Bendable Electronics and Sensing Technologies (BEST) group, which conducts fundamental research on high-mobility materials based flexible electronics and electronic skin, and their application in robotics, prosthetics and wearable systems.
His multidisciplinary research interests include Flexible and Printable Electronics, Electronic Skin, Robotic Tactile Sensing, and Wearable Electronics. He has published more than 130 research articles, 6 book (5 at various publication stages) and 9 patents (including 7 submitted). He has led many international projects funded by many agencies including European Commission, EPSRC, The Royal Society and The Royal Academy of Engineering.
He is the Distinguished Lecturer of IEEE Sensors Council and is on the Editorial Boards of IEEE Transactions on Robotics and IEEE Sensors Journal. He has been guest editor of 4 Special Journal Issues. He represents IEEE Robotics and Automation Society in the Administrative Committee (AdCom) of IEEE Sensors Council. He was General Chair of IEEE PRIME 2015 and is the Technical Program Chair (TPC) for 2017 IEEE Sensors Conference. He is the founding chair of the UKRI section chapter of IEEE Sensor Council.
Dr. Dahiya holds prestigious EPSRC Fellowship. In past he received Marie Curie Fellowship and Japanese Monbusho Fellowship. He was awarded with the University Gold Medal and received 2 best paper awards and 2 second best paper awards (as co-author) IEEE international conferences.
Thursday, June 23, 2016
h. 14.30 – 15.10
Livio BALDI
Formerly ST Microelectronics, Italy
ECSEL Italy: Italian University and Industry Together for Europe
ABSTRACT
ECSEL is the largest Public-Private Partnership in Horizon2020 and with around 2.4BEuro it is the largest funding program in the ICT domain. It builds on the previous ENIAC and ARTEMIS Joint Technology Initiatives of FP7, and is characterised by the joint funding by the Commission and the Member States, and the possibility to cover also large projects. However, after a promising start with the previous ENIAC and ARTEMIS JU the Italian contribution has been decreasing, and Italian bureaucracy is giving an hard time to Universities and SME’s. The ECSEL Mirror Group Italy brings together Italian partners of the three European Technology Platforms participating in the ECSEL Joint Undertaking: AENEAS, ARTEMISIA and EPOSS, with the goal to involve central and regional funding authorities in the support of the ECSEL initiative and to promote the Italian participation to project proposals, with special attention to SMEs.
BIOGRAPHY
Livio Baldi graduated in Electronic Engineering in 1973 at the University of Pavia. In 1974 he joined SGS-ATES (now STMicroelectronics), where he was responsible for the development of CMOS processes with embedded NVM, for their Design Platform, and afterwards for the participation of ST Italy in research projects under EUREKA and Framework Programmes. He moved to Numonyx and to Micron in the same role, following the spin-off of memory activities by STMicroelectronics. He participated in setting up the JESSI initiative, and the ENIAC ETP and is member of the AENEAS Support Group, as permanent guest. Currently retired, he is acting as consultant for European funded projects on behalf of two Italian semiconductor companies. He is industrial co-leader of the NEREID Support Action of H2020. He holds 34 US Patents and 28 European patents.
Tavola Rotonda
Friday, June 24, 2016
h. 09.00 – 10.40
Scenari, prospettive e opportunità di integrazione tra discipline elettriche ed elettroniche
Coordinator:
Andrea LACAITA
Politecnico di Milano (ING-INF/01 President)
- Nicola PAONE
Università Politecnica delle Marche (ING-IND/12 President)
- Dario PETRI
Università di Trento (ING-INF/07 President)
- Enrico SANGIORGI
Università di Bologna
- Alberto TENCONI
Politecnico di Torino (ING-IND/32 President)
- Alfredo TESTA
Seconda Università di Napoli (ING-IND/33 President)
- Fabio VILLONE
Università Cassino e Lazio Meridionale (ING-IND/31 President)
GE Distinguished Lecturers
Friday, June 24, 2016
h. 11.40 – 12.20
Cecilia METRA
University of Bologna, Italy
Test and Reliability Challenges for High Performance Circuits and Systems
ABSTRACT
The continuous advances of microelectronic technology enables to keep on increasing system complexity and performance, thus offering new opportunities for implementation and realization that were simply unthinkable a few years before. However, such a continuous evolution comes together with an increased likelihood of faults and an improved entity of process parameter variations occurring during fabrication, as well as with an enhanced vulnerability to radiation induced transient faults and ageing mechanisms occurring in the field, which pose continuously new challenges to circuits’ and systems’ test and reliability. Such test and reliability challenges, as well as possible solutions to face them will be addressed.
BIOGRAPHY
Cecilia Metra is a Full Professor in Electronics at the University of Bologna, Italy, where she received the Ph.D. in Electronic Engineering and Computer Science. In 2002, she was a Visiting Faculty Consultant for Intel Corporation in the USA. She is/has been (2016-2018/2013-2015) Member of the Board of Governors of the IEEE Computer Society (CS). She is Editor in Chief of the magazine “Computing Now” of the IEEE CS, and member of the Editorial Boards of several international Journals. She has been involved in the organization of several IEEE sponsored Symposia/Workshops. Her research interests are in the field of design and test of digital systems, reliable and error resilient systems, fault tolerance, on-line test and fault modeling. She is an IEEE Fellow Member and a Golden Core Member of the IEEE CS.
Friday, June 24, 2016
h. 12.20 – 13.00
Luca SELMI
University of Udine, Italy
III-V Compound Semiconductor MOSFETs for Logic: the Next Breakthrough Innovation for CMOS Technology?
ABSTRACT
Integration of III-V compound semiconductors on Silicon platforms has made remarkable progress in recent years. After substitution of Silicon dioxide with High-k materials, the replacement of Silicon with such high electron mobility materials could become the next major techonology booster to sustain the progress of CMOS toward its ultimate limits. In fact, In(x)Ga(1-x)As MOSFETs offer higher injection velocity than (strained) Silicon, which is essential to achieve higher MOSFET on-current at given off-current. In turn, this feature could enable substantial supply voltage and power consumption scaling without compromising switching delay and area density.
The development of III-V-based nanoscale MOSFET technology for logic, integrated onto Silicon wafers, poses many challenges for material selection, device design, fabrication, electrical characterization, modeling and simulation. Many detrimental effects (e.g., reduced density of states, traps and Fermi level pinning, enhanced source-to-drain leakage and series resistance, just to mention a few) may delay or prevent industry from achieving the benefits expected from III-V MOSFETs.
The lecture will overview recent research in the field, with emphasis on the added value that advanced modeling and simulation tools provides to CMOS technology development and device design.
BIOGRAPHY
Luca Selmi (FIEEE 2015) received the PhD from University of Bologna in 1992. In 2000 he became Professor of Electronics at University of Udine, Italy. In 1989-1990 he was visiting scientist at Hewlett Packard Microwave Technology Division. His research interests include performance and reliability characterization, simulation and modeling of nanoscale MOSFETs, with emphasis on hot-carrier effects, quasi-ballistic transport, Monte Carlo simulation techniques, device characterization, and with a recent twist toward nanoelectronic (bio)sensors. He co-authored more than 240 scientific papers, several book chapters and the book “Nanoscale MOS Transistors”. He has been TPC member of IEEE IEDM (three times), ESSDERC, SISPAD, IRPS, and general chair of IEEE ICMTS and INFOS Conferences. He is Associate Editor of IEEE EDL since 2000. He is currently TPC member and publications chair of the VLSI Technology Symposium, and Coordinator of the EC FP7 project “III-V-MOS”.